Report

Logic Gates and Computation from Assembled Nanowire Building Blocks

Science  09 Nov 2001:
Vol. 294, Issue 5545, pp. 1313-1317
DOI: 10.1126/science.1066192

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Abstract

Miniaturization in electronics through improvements in established “top-down” fabrication techniques is approaching the point where fundamental issues are expected to limit the dramatic increases in computing seen over the past several decades. Here we report a “bottom-up” approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks. We show that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode. Nanowire junction arrays have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computation.

  • * These authors contributed equally to this work.

  • To whom correspondence should be addressed. E-mail: cml{at}cmliris.harvard.edu

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