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Self-Aligned, Vertical-Channel, Polymer Field-Effect Transistors

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Science  21 Mar 2003:
Vol. 299, Issue 5614, pp. 1881-1884
DOI: 10.1126/science.1081279

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Abstract

The manufacture of high-performance, conjugated polymer transistor circuits on flexible plastic substrates requires patterning techniques that are capable of defining critical features with submicrometer resolution. We used solid-state embossing to produce polymer field-effect transistors with submicrometer critical features in planar and vertical configurations. Embossing is used for the controlled microcutting of vertical sidewalls into polymer multilayer structures without smearing. Vertical-channel polymer field-effect transistors on flexible poly(ethylene terephthalate) substrates were fabricated, in which the critical channel length of 0.7 to 0.9 micrometers was defined by the thickness of a spin-coated insulator layer. Gate electrodes were self-aligned to minimize overlap capacitance by inkjet printing that used the embossed grooves to define a surface-energy pattern.

  • * To whom correspondence should be addressed. E-mail: hs220{at}phy.cam.ac.uk

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