Low-Voltage Organic Transistors on Plastic Comprising High-Dielectric Constant Gate Insulators

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Science  05 Feb 1999:
Vol. 283, Issue 5403, pp. 822-824
DOI: 10.1126/science.283.5403.822


The gate bias dependence of the field-effect mobility in pentacene-based insulated gate field-effect transistors (IGFETs) was interpreted on the basis of the interaction of charge carriers with localized trap levels in the band gap. This understanding was used to design and fabricate IGFETs with mobility of more than 0.3 square centimeter per volt per second and current modulation of 105, with the use of amorphous metal oxide gate insulators. These values were obtained at operating voltage ranges as low as 5 volts, which are much smaller than previously reported results. An all-room-temperature fabrication process sequence was used, which enabled the demonstration of high-performance organic IGFETs on transparent plastic substrates, at low operating voltages for organic devices.

IGFETs (inset in Fig. 1) comprising an organic semiconducting layer have been the focus of considerable research activity during the past 10 years (1). Devices based on conjugated polymers (2–4), oligomers (5–7), or other molecules (4, 8–11) have been fabricated and studied in the past; progress in performance of organic semiconductor IGFETs during the last decade has been reviewed recently (7, 12).

Figure 1

Plots of ID versus VG (left axis) and (ID)1/2 versus VG (right axis) from an organic IGFET with a 0.5-μm SiO2 gate insulator. (Inset) Schematic diagram of organic IGFET.

Because of the relatively low mobility of the organic semiconductor layers, organic IGFETs cannot rival the materials and technology used in applications requiring very high switching speeds. However, the characteristics and demonstrated performance of organic IGFETs suggest that they could be competitive for existing or future applications requiring large area coverage, mechanical flexibility, low-temperature processing, and low overall cost. Such applications include thin-film transistor (TFT) switching devices for active matrix liquid crystal displays (AMLCD), where hydrogenated amorphous silicon (a-Si:H) TFTs are currently used, active matrix organic light-emitting diode displays (AMOLED), and low end data storage (such as smart cards and identification tags).

Two classes of organic semiconductors have exhibited the best IGFET performance accompanied by good environmental stability: thiophene oligomers and pentacene. Hexathiophene oligomers and their derivatives, first introduced in organic IGFETs by Garnier et al. (5, 6), are conjugated oligomers that exhibit a pronounced capability for self-assembly in close-packed configurations. The highest value of field-effect mobility (μ) reported for α,ω-di-hexyl-hexathienylene (DH6T) thin films is 0.13 cm2 V−1 s−1(7). For unsubstituted α-hexathienylene (α-6T) and SiO2 gate insulator, this value is 0.03 cm2 V−1 s−1 (13).

Pentacene TFTs have produced the highest field-effect mobility values reported for organic IGFETs, which in some cases are greater than 0.6 cm2 V−1 s−1 (11,14). Field-effect mobility depends on the deposition conditions of the pentacene layer and the device configuration. Mobility measured from solution-processed precursor-route pentacene (4) IGFETs approaches 0.01 cm2 V−1 s−1. Mobility of 0.62 cm2 V−1 s−1 from vapor-deposited, purified pentacene-based devices has also been reported for films grown at a substrate temperature of 120°C (11, 14). Those devices exhibited an on/off current ratio ( Ion/ Ioff) of 108. These values of mobility and on/off ratio are similar to the ones reported for a-Si:H TFT. However, the operating voltage required to achieve such high performance from pentacene devices is too high (a voltage swing from −100 to +100 V is required) in comparison with a-Si:H and for practical applications in general (15).

A dependence of the calculated mobility of pentacene IGFETs on gate voltage was observed earlier (10). However, relatively low voltages up to only ±20 V were used in that work, and subsequently only a small portion of the voltage span of interest was probed. We studied the gate voltage dependence of mobility in pentacene devices and used our understanding to demonstrate high-performance pentacene IGFETs exhibiting high mobility and good current modulation at low operating voltages. For this purpose, we used a metal oxide film with a relatively high dielectric constant, barium zirconate titanate (BZT), as gate insulator. Our devices were fabricated with an all-room-temperature (RT) process. We demonstrated full compatibility with transparent plastic substrates by making devices on such substrates.

The typical device configuration used in this work is depicted in the inset in Fig. 1. Pentacene films were deposited by means of vapor deposition. During deposition, the substrate was kept at RT. As-received pentacene (97+%; FLUKA Chemical) was used. Both mobility and current modulation ( Ion/ Ioff) increase when pentacene is purified before deposition (14), so we expect that all our results can be substantially improved by using purified pentacene. Further details on the vacuum chamber configuration and deposition conditions can be found in (7). The BZT gate dielectric films were deposited on oxidized Si wafers or thin polycarbonate sheet, provided with Pt gate lines, with radio frequency magnetron sputtering of a sintered powder target of BZT, in an Ar/O2 gas mixture. The substrates were held at RT during sputtering, and the chamber pressure was 2.5 × 10−3torr. The power density was 0.8 W cm−2. Gold source and drain electrodes were vapor deposited on top of the pentacene layer through a shadow mask. For large channel devices, a conventional metal mask was used. To create devices with channel length (L) on the order of 10 μm, we fabricated and used special Si membrane masks.

The operation of pentacene IGFETs is adequately modeled by standard field-effect transistor equations (16), as shown previously for various organic semiconductor IGFETs (5, 10,17). Typical p -type semiconductor characteristics are exhibited in saturation as shown in Fig. 1, which is a drain current ( ID) versus gate voltage ( VG) plot. It corresponds to a device with L = 4.4 μm and width W = 1500 μm and comprising pentacene as the semiconductor, 0.5-μm-thick thermally grown SiO2 as the gate insulator, heavily doped Si ( n type) as the gate electrode, and Au source and drain electrodes. The μ was 0.16 cm2V−1 s−1, and the subthreshold voltage VT was about −30 V. The Ion/ Ioff ratio was above 107 when VG was scanned from −100 to +80 V. The measured mobility value is in agreement with reported hole mobility from IGFETs based on pentacene films grown at room temperature (14, 18). The mobility from devices with lower W/L ratios was considerably higher and reached 0.25 cm2 V−1 s−1 for devices with W/L = 3.5 because of stray currents outside the channel. It is important that W/L is at least 10 to minimize the effects of such currents. An alternative way to achieve this would be to pattern the semiconductor so that its width does not exceed the width of the channel. Plots of ID versus drain voltage ( VD) at different VG are also typical, and similar mobility was calculated from the linear regime.

Interestingly enough, when a thinner (0.12 μm) SiO2 gate insulator was used, the mobility, measured at voltages as high as the ones used in the thick (0.5 μm) SiO2 devices (Fig. 1), was substantially higher, varying between 0.4 and 0.6 cm2V−1 s−1. In the devices with thin SiO2, the gate field E and charge per unit area on the semiconductor side of the insulator QSwere substantially higher because of the reduction in insulator thickness. We need to separate the effects of these two parameters to determine which one is responsible for the increase in mobility.

The dependence of μ on VG, E, and QS is shown in Fig. 2. The solid circles refer to all three abscissa scales and correspond to a pentacene-based device with a 0.12-μm-thick SiO2 gate insulator thermally grown on the surface of a heavily doped n -type Si gate. The mobility initially increases linearly with increasing VG, E, and QS and eventually saturates. The two open circles correspond to μ versus E and μ versus QS plots only and are generated by a similar device, which, however, comprised a 0.5-μm-thick SiO2 gate insulator. QS is a function of the concentration of accumulated carriers in the channel region (N). Because the nature of field-induced conductivity has been shown in the past to be two dimensional and confined very close to the interface of the insulator with the organic semiconductor (13), all of this charge is expected to be localized in the first few semiconductor monolayers from this interface. An increase in VG results in an increase in E and N. However, for the same VG, N depends on both the dielectric constant of the gate dielectric and its thickness, whereas E depends only on its thickness.

Figure 2

Dependence of μ on VG, E, and QS. Solid circles refer to all three x axes and correspond to devices with 0.12-μm-thick SiO2. Open circles refer only to E and QS axes (0.5-μm-thick SiO2). Dotted symbols in ellipse refer to the E axis only. Triangle, BZT; square, BST; diamond, Si3N4insulator.

To determine which of the two, N or E, is involved in the mechanism that enhances the field-effect mobility, we fabricated IGFETs with gate insulators having a dielectric constant larger than that of SiO2 and a thickness close to 0.12 μm, similar to that of the SiO2 devices. Thus, a similar accumulated carrier concentration was attained as in the SiO2 case, but at much lower gate voltages, with all the other parameters kept the same. If mobility depends on N rather than E, then a high mobility should be achieved in the devices comprising the high–dielectric constant ɛ gate insulator at lower voltages, and hence gate fields, than in TFTs with a comparable thickness of SiO2. In other words, for the same gate field, a higher mobility should be measured from devices with higher ɛ insulators, which we observed (Fig. 2). The dotted symbols in the ellipse represent a μ versus E plot, corresponding to devices comprising gate insulators with ɛ higher than that of SiO2. The triangles correspond to BZT (ɛ = 17.3), the squares to barium strontium titanate (BST) (ɛ = 16) (19), and the diamond to Si3N4 (ɛ = 6.2).

Figure 3 corresponds to an IGFET that comprises a 0.122-μm-thick film of BZT gate insulator. The device (W = 1500 μm and L = 18.4 μm) exhibits excellent p -type IGFET characteristics (see inset). The plot corresponding to the left axis is a semilog plot of ID versus VG, and the plot corresponding to the right axis is a plot ofID versus VG; μ calculated from this plot is 0.32 cm2 V−1s−1. This mobility was obtained at much lower gate fields than those necessary to obtain the same mobility with the SiO2 gate insulator (see Fig. 2). The current modulation is 105 for a VG variation from −14 to 6 V and VT ≅ −4 V.

Figure 3

Plots of ID versus VG (left axis) and (ID)1/2 versus VG (right axis) from an organic IGFET with a 0.122-μm BZT gate insulator. (Inset) ID versus VD at various VG.

High mobilities can be achieved at low operating voltages in pentacene IGFETs, when relatively high dielectric constant gate insulators are used. The gate voltage dependence in these devices is a result of the higher concentration of the charge carriers accumulated in the channel, which was achieved with these insulators. The applied gate field used in Fig. 3 was kept more than 3.5 times lower compared with the fields used in thin SiO2 devices in Fig. 2 to obtain similar mobility values. This conclusion is corroborated by the fact that devices made with Si3N4 as the gate insulator, which has a dielectric constant of about 6.2, required a gate voltage reduced proportionally to the dielectric constant increase relative to SiO2 to reach mobility equal to or even higher (μ = 0.6 cm2 V−1 s−1) than that of devices with a SiO2 gate insulator with the same thickness.

Because the gate voltage dependence of mobility is due to N and not E, we can safely eliminate the possibility that a Poole-Frenkel mechanism (12, 20) is responsible for such dependence. The multiple trapping and release model (21), which is widely used to model the behavior of a-Si:H TFTs, seems to be the likely mechanism to explain the observed characteristics. This model has been successfully used in the past to model α-6T and DH6T device characteristics (12, 22). According to this model, a large concentration of localized states exists in the forbidden gap, above a narrow delocalized band (that is, the top of the valence band). At low gate bias, most of the holes injected in the semiconductor are trapped into these localized states. The deepest states are filled first and carriers can be released thermally. As the negative gate bias increases, the Fermi level approaches the delocalized band edge and more traps are filled. At an appropriately high voltage, all of the trap states are filled, and any subsequently injected carriers are free to move with the microscopic mobility associated with carriers in the delocalized band. In devices with a 0.12-μm-thick SiO2 gate insulator, the negative gate bias required to reach such carrier concentration levels was above 70 to 80 V. As shown in Fig. 2, the mobility saturates above this gate bias, indicating that all localized states are occupied. By using higher dielectric constant insulators, a sufficient number of carriers to fill all these traps are generated by the field effect at much lower gate voltages, and this is the reason that high mobilities are observed at such low voltages compared with the SiO2-based devices. Several localized trap levels have been reported for thin polycrystalline vapor-deposited films of pentacene at depths ranging from 0.06 to 0.68 eV (23), which could account for the aforementioned localized states. Brown et al. (17) have used an alternative model, based on hopping polaron transport processes, to explain the gate bias dependence in organic semiconductor IGFETs.

On a more practical note, all of the steps in the fabrication process of our low operating voltage BZT-pentacene–based devices were performed entirely at RT. Initially, we used sol-gel–deposited BST films as the high ɛ gate insulator (19), which required annealing at 400°C, and although they produced excellent low-voltage device characteristics, they were not compatible with transparent plastic substrates. The RT fabricated devices we now report are compatible with transparent plastic substrates. Given their operating characteristics, which are very close to the characteristics of the widely used a-Si:H TFT, they are good candidates for applications involving AMLCD or AMOLED displays on plastic substrates. Several efforts in the past to develop a-Si:H TFT-based liquid crystal displays on plastic have not been successful because of deterioration of the performance of those TFTs when a-Si:H was grown at temperatures below 150° to 200°C.

To demonstrate the feasibility of the above idea, we successfully fabricated pentacene-based TFT on very transparent plastic substrates (polycarbonate). The BZT gate insulator was 0.128 μm thick. Their performance was similar to devices fabricated on quartz or SiO2/Si substrates. Figure 4shows the characteristics of such a device (W = 1500 μm and L = 69.2 μm). Mobility was 0.2 cm2 V−1 s−1, as calculated in the saturation region. Mobility values as high as 0.38 cm2V−1 s−1 were measured from devices with a W/L ratio of 4. These are the highest reported mobilities from devices fabricated on plastic substrates, and they are obtained at a maximum gate voltage of only 4 V. The highest mobility reported before for organic IGFET on plastic substrates was up to 0.1 cm2 V−1 s−1, and it required the operating voltage to be modulated between 0 and −100 V (24).

Figure 4

Plot of ID versus VD at various VG from an organic IGFET on polycarbonate.

  • * To whom correspondence should be addressed. E-mail address: dimitrak{at}


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