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Functional Nanoscale Electronic Devices Assembled Using Silicon Nanowire Building Blocks

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Science  02 Feb 2001:
Vol. 291, Issue 5505, pp. 851-853
DOI: 10.1126/science.291.5505.851

Abstract

Because semiconductor nanowires can transport electrons and holes, they could function as building blocks for nanoscale electronics assembled without the need for complex and costly fabrication facilities. Boron- and phosphorous-doped silicon nanowires were used as building blocks to assemble three types of semiconductor nanodevices. Passive diode structures consisting of crossedp- and n-type nanowires exhibit rectifying transport similar to planar p-n junctions. Active bipolar transistors, consisting of heavily and lightlyn-doped nanowires crossing a common p-type wire base, exhibit common base and emitter current gains as large as 0.94 and 16, respectively. In addition, p- and n-type nanowires have been used to assemble complementary inverter-like structures. The facile assembly of key electronic device elements from well-defined nanoscale building blocks may represent a step toward a “bottom-up” paradigm for electronics manufacturing.

Miniaturization of silicon electronics is being intensely pursued (1), although fundamental limits of lithography may prevent current techniques from reaching the deep nanometer regime for highly integrated devices (2). The use of nanoscale structures as building blocks for self-assembled (3–6) structures could potentially eliminate conventional and costly fabrication lines, while still maintaining some concepts that have proven successful in microelectronics. One-dimensional structures, such as nanowires (NWs) and carbon nanotubes (NTs), could be ideal building blocks for nanoelectronics (7, 8), because they can function both as devices and as the wires that access them. Electrical transport studies of NTs have yielded data supporting the possibility of field-effect transistors (9, 10), low-temperature single-electron transistors (11, 12), intramolecular metal-semiconductor diodes (13, 14), and intermolecular-crossed NT-NT diodes (15). However, the use of NT building blocks is limited, because the selective growth and/or assembly of semiconducting or metallic NTs (7, 8) is not currently possible.

Successful implementation of a building-block approach for the assembly of nanodevices and device arrays will require that the electronic properties of the blocks be defined and controlled. Recently, we demonstrated that the carrier type (electrons, n-type; holes, p-type) and carrier concentration in single-crystal silicon NWs (SiNWs) could be controlled during growth, using phosphorous and boron dopants (16). We now report the rational assembly of these well-defined SiNW building blocks into functional electronic devices in which critical junctions are formed by the assembly of one or more SiNW/SiNW crosses using p- andn-type materials.

The n- and p-type SiNWs were synthesized by laser-assisted catalytic growth (16). Different junctions (e.g., n-n, p-p, and p-n) were formed by sequential deposition of solutions of n- and p-type materials or by manipulation, and contacts to the SiNWs were defined by electron beam lithography (16, 17). Field emission scanning electron microscopy (FESEM) was used to image a typicalp-n junction assembled from 20-nm-diameterp- and n-type SiNWs (Fig. 1A). Current versus voltage (I-V) data recorded on the individualp- and n-type SiNWs (Fig. 1B) are linear and indicate that metal-SiNW contacts are ohmic (18, 19), and thus will not make a significant contribution to theI-V behavior of the junctions. Significantly, four-terminal I-V measurements made on thep-n junction formed at the NW-NW cross show good current rectification (Fig. 1B). These nanoscale junctions thus exhibit similar behavior to bulk semiconductor p-njunctions.

Figure 1

Crossed SiNW junctions. (A) Typical FESEM image of a crossed SiNW junction with Al/Au contacts. The scale bar is 2 μm. The diameters of the NWs used in these studies ranged from 20 to 50 nm. (B through D)I-V behavior of p-n,p-p, and n-n junctions, respectively. The black and green curves correspond to theI-V behavior of individual p- andn-type SiNWs, respectively. The red curves representI-V behavior of junctions. (B) The red curves correspond to four-terminal I-V through thep-n junction; the current values are multiplied by 10. The solid line corresponds to voltage drop measured between leads 3 and 4, and the dashed line to voltage between 3 and 2. (C and D) The red curves are two-terminal I-Vthrough p-p and n-njunctions, respectively. The solid lines correspond to data from contacts 1-2, and the dashed lines correspond to data from the other three pairs (that is, 1 and 4, 2 and 3, and 3 and 4).

Current rectification has been observed in more than 40p-n junctions assembled from SiNWs in the cross geometry and, we believe, is a robust phenomenon for these NW junction structures. We carried out additional experiments to demonstrate that this diode behavior is indeed due to the p-njunction formed by the p- and n-type SiNWs. First, four-terminal p-n junction transport measurements made through different combinations of the contacts show similar rectifying behavior and current level (solid and dashed curves, respectively; Fig. 1B), are similar to two-terminal junction measurements, and show that current is substantially smaller than that through the individual SiNWs, demonstrating that the junction dominates the I-V behavior. Second, transport data recorded on p-p (Fig. 1C) and n-n(Fig. 1D) junctions show linear or nearly linear behavior, demonstrating that interface oxide between individual SiNWs does not produce a significant tunneling barrier (20, 21), as such a barrier would lead to highly nonlinearI-V. Hence, our data show that crossed SiNWs make good electrical contact with each other despite the small contact area (10−12 to 10−10 cm2) and simple method of junction fabrication, and can exhibit good diode behavior in the case of p-n junctions.

Because p-n junctions represent the basic element of many devices (19), including amplifiers and switches, we have explored the possibility of assembling such devices at the nanometer scale using our n- and p-type SiNWs. First, the assembly and transport properties of bipolar transistors (19), which are active devices capable of current gain, have been investigated. The conventional structure of a bipolar transistor (Fig. 2A, left) requires three distinct material types: for example, a highly doped n-type (n +) layer, which is the emitter (E), ap-type base (B), and an n-type collector (C). Significantly, this basicn +-p-n structure can be easily realized (22) by assemblingn +- and n-type SiNWs across ap-type SiNW base (Fig. 2A, right, and Fig. 2B).

Figure 2

Shown aren +-p-n SiNW bipolar transistors. (A) Schematics illustrating the common base configuration of ann +-p-n bipolar transistor (19) and the corresponding structure built from crossed SiNWs (right). The n +-,p-, and n-type SiNWs function as emitter, base, and collector, respectively. (B) Typical FESEM image of SiNW bipolar transistor. The three wires labeled asn +, p, and n were used as emitter, base, and collector, respectively. Scale bar, 5 μm. (C) Collector current versus collector-base voltage recorded on an n +-p-ntransistor with emitter and collector SiNWs 15 μm apart. Curves 1 to 4 correspond to the data recorded for emitter-base voltages of −1, −2, −3, −4 V, respectively. Regime I and II are separated by a dashed line, corresponding to saturation mode and active mode, respectively. (D), The common base current gain versus collector-base voltage.

Transport measurements made on the individualn +-, n-, and p-type SiNWs, and the n +-p andp-n NW junctions showed that the metal contacts to individual SiNWs were ohmic or nearly ohmic and that the junctions were rectifying. The behavior of the bipolar transistor was assessed from measurements of the collector current as a function of C-B voltage (Fig. 2C); the n +-SiNW emitter was set at different forward bias values (curves 1 through 4) for these measurements. In general, the collector current is relatively constant (versus C-B voltage) in region II (Fig. 2), corresponding to the collector in reverse bias with only a very small leakage current, and this current value increases as the emitter forward bias/injected current is increased (23). This large flow of collector current in reverse bias demonstrated transistor action. Hence, these simple SiNW-based bipolar transistors exhibit behavior similar to that found in standard planar devices (19), and moreover, can exhibit very good current gain.

The common base current gain, defined as the ratio of the collector current to emitter current (Fig. 2D), and corresponding common emitter current gain, defined as the ratio of collector current to base current, have values of 0.94 and 16, respectively. The relatively large current gain observed in these simple devices suggests several important points. First, the efficiency of electron injection from emitter to base must be quite high. We believe that efficiency reflects our ability to control doping in these nanowires and produce the desired n +-p E-B junction. Second, these relatively large current gains have been achieved in a device (Fig. 2) with a large (15 μm) base width, suggesting that the mobility of injected electrons can be quite high in the SiNWs. These observations also indicate clear directions for improving the SiNW bipolar transistors. For example, it will be interesting to study the current gain as a function of base width, because it is possible to assemble structures with separations of the n +and n NWs on the order of 100 nm or less.

We have also carried out preliminary experiments to explore the assembly of other types of devices using these SiNW building blocks. Specifically, the ability to prepare n- andp-type NWs enables the assembly of complementary inverter-like structures (Fig. 3), which in analogy to conventional Si technology, could exhibit the low static power dissipation critical to highly integrated nanoelectronics. The lightly doped p- and n-type SiNWs used in the inverters show large gate effects and can be completely depleted (Fig. 3B, inset). The output voltage from the device (V out) varies from negative (high) to zero as the input gate voltage (V in) from positive to negative; that is, the signal is inverted. From the slope of transfer characteristics, we calculate a voltage gain of 0.13. The low gain exhibited by our initial devices could be improved by preparing SiNW building blocks that switch on and off at lower voltages (24). Nevertheless, the present devices still exhibit the low static power dissipation expected of a complementary inverter-like structure; that is, the SiNW complementary device has a static dissipation of 0.5 to 5 nW in either high or low states, whereas a single SiNW device has a power dissipation 103 to 104 larger.

Figure 3

SiNW complementary inverters. (A) Standard representation (19) of a complementary inverter formed usingn- and p-type field- effect transistors (top) and a schematic of a similar structure assembled from n- andp-type SiNWs (bottom). In the NW device, one end of then-type NW is biased at negative voltage and one end of thep-type NW is grounded. The back gate voltage isV in, and the other ends of the p- andn-type NWs are connected as V out. (B) V out versusV in for a p-ncomplementary inverter-like structure. The inset is theI-V curves of p-type NW in the inverter. Curves 1 to 5 correspond to I-V at back gate voltage –50, –30, –10, 0, and 10 V, respectively.

Our studies demonstrate a rational approach for building key nanoscale electronic devices from SiNWs that have controlled carrier type and concentration, and thus represent a step toward a “bottom-up” paradigm for electronics manufacturing. Although these studies have focused on the assembly and properties of single SiNW-based devices, combination of this approach with emerging methods for hierarchical assembly (25, 26) could enable parallel and scalable organization of complex electronic devices on a bench top.

  • * To whom correspondence should be addressed. E-mail: cml{at}cmliris.harvard.edu

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