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One-Dimensional Electrical Contact to a Two-Dimensional Material

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Science  01 Nov 2013:
Vol. 342, Issue 6158, pp. 614-617
DOI: 10.1126/science.1244358

Better Contact Along the Edge

Electrical contact to graphene is normally done with metal contacts on its flat face, where there are few strong bonding sites for the metal. Wang et al. (p. 614) encapsulated graphene with hexagonal boron nitride sheets and made metal contacts along its edge, where bonding orbitals are exposed. The resulting heterostructures had high electronic performance, with room-temperature carrier mobilities near the theoretical phonon-scattering limit.

Abstract

Heterostructures based on layering of two-dimensional (2D) materials such as graphene and hexagonal boron nitride represent a new class of electronic devices. Realizing this potential, however, depends critically on the ability to make high-quality electrical contact. Here, we report a contact geometry in which we metalize only the 1D edge of a 2D graphene layer. In addition to outperforming conventional surface contacts, the edge-contact geometry allows a complete separation of the layer assembly and contact metallization processes. In graphene heterostructures, this enables high electronic performance, including low-temperature ballistic transport over distances longer than 15 micrometers, and room-temperature mobility comparable to the theoretical phonon-scattering limit. The edge-contact geometry provides new design possibilities for multilayered structures of complimentary 2D materials.

Atomically thin two-dimensional (2D) materials (1, 2)—such as graphene, hexagonal boron nitride (BN), and the transition metal dichalcogenides (TMDCs)—offer a variety of outstanding properties for fundamental studies and applications. More recently, the capability to assemble multiple 2D materials with complementary properties into layered heterogeneous structures presents an exciting new opportunity in materials design (211), but several fundamental challenges remain, including making good electrical contact to the encapsulated 2D layers. Electrically interfacing 3D metal electrodes to 2D materials is inherently problematic. For graphene devices, the customary approach is to metalize the 2D surface. However, graphene lacks surface bonding sites, so the lack of chemical bonding and strong orbital hybridization leads to large contact resistance (1219). In multilayer structures, the requirement to expose the surface for metallization presents additional restrictive demands on the fabrication process. For example, encapsulated BN/graphene/BN heterostructures (BN-G-BN) need to be assembled sequentially so as to leave the graphene surface accessible during metallization, because no process to selectively remove the BN layers has been identified. Moreover, polymers used during both the layer assembly and lithography steps are difficult to remove (20). Their presence can degrade the electrical contact (21, 22) and channel mobility (23) and contaminate the layer interfaces, causing bubbles and wrinkles that multiply with the addition of each successive layer, limiting typical device size to ~1 μm (2, 4, 24).

We demonstrate a new device topology where 3D metal electrodes are connected to a 2D graphene layer along the 1D graphene edge (14, 19, 2527). We first encapsulate the graphene layer in BN. The entire multilevel stack is then etched to expose only the edge of the graphene layer, which is in turn metalized. This contact geometry is similar to that in conventional semiconductor field-effect transistors (FETs), where doped 3D bulk regions make lateral contact to a 2D electron gas. Although carrier injection is limited only to the 1D atomic edge of the graphene sheet, the contact resistance is remarkably low (as low as 100 ohm·μm in some devices). The edge-contact process also allows a complete separation of the layer assembly and contact metallization processes, which permits implementation of a polymer-free layer assembly method. Combining these two techniques, we fabricated graphene devices with unprecedented performance exhibiting room-temperature mobility up to 140,000 cm2/Vs and sheet resistivity below 40 ohms per square at n > 4 × 1012 cm2, comparable to the theoretical limit imposed by acoustic phonon scattering. At temperatures below 40 K, we observed ballistic transport over length scales longer than 15 μm.

The edge-contact fabrication process is illustrated in Fig. 1A. Beginning with a BN-G-BN heterostructure, a hard mask is defined on the top BN surface by electron-beam lithography (EBL) of a hydrogen-silsesquioxane (HSQ) resist. The regions of the heterostructure outside of the mask are then plasma-etched (see supplementary materials section 1.2) to expose the graphene edge. Finally, metal leads (1 nm Cr/15 nm Pd/60 nm Au) are deposited by electron beam evaporation to make electrical contact along this edge (other metal combinations showed inferior performance) (table S1). In Fig. 1B, a cross section scanning transmission electron microscope (STEM) image of a representative device shows the resulting geometry of the edge-contact. In the magnified region, electron energy-loss spectroscopy (EELS) mapping confirms that the graphene and metal overlap at a well-defined interface. From the angle of the etch profile (~45°), we expect that the graphene terrace is exposed only 1 to 2 atoms deep. Within the resolution of the STEM image, there is no evidence of metal diffusion into the graphene/BN interface, confirming the truly edge nature of the contact. The EELS map additionally indicates that contact was made predominantly to the Cr adhesion layer.

Fig. 1 Edge-contact.

(A) Schematic of the edge-contact fabrication process. (B) High-resolution bright-field STEM image showing details of the edge-contact geometry. The expanded region shows a magnified false-color EELS map (fig. S6) of the interface between the graphene edge and metal lead. (C) Two-terminal resistance versus channel length at fixed density, measured from a single graphene device in the TLM geometry. Solid line is a linear fit to the data. Inset shows an optical image of a TLM device with edge-contacts. (D) Contact resistance calculated from the linear fit at multiple carrier densities for two separate devices. Error bars represent uncertainty in the fitting. Inset shows resistance scaling with contact width measured from a separate device.

To characterize the quality of the edge-contact, we used the transfer-length method (TLM). Multiple two-terminal graphene devices consisting of a uniform 2-μm channel width but with varying channel lengths were fabricated, and their resistances were measured as a function of carrier density n induced by a voltage applied to a silicon back gate. Figure 1C shows the resistance versus channel length, measured at two different carrier densities. In the diffusive regime, where the channel length remains several times longer than the mean free path, the total resistance in a two-terminal measurement can be written as R = 2RC(W) + ρL/W, where RC is the contact resistance, L is the device length, W is the device width, and ρ is the 2D channel resistivity; RC and ρ were extracted as the intercept and slope of a linear fit to the data shown here for two separate devices (Fig. 1D). RC was remarkably low, reaching ~150 ohm·μm for n-type carriers at high density. This value is ~25% lower than the best reported surface contacts without additional engineering such as chemical (18) or electrostatic (17) doping.

Because this value is obtained in a two-terminal geometry, it includes the intrinsic limit set by the quantum resistance of the channel, which can be subtracted to yield an extrinsic contact resistance nearly 100 ohm·μm (fig. S4). In both devices, the contact resistance is asymmetric, being lower by a factor of 2 to 3 when the device is gated to be n-type versus p-type. This asymmetry is consistent with electrical contact being made primarily to the Cr adhesion layer, as suggested by the cross-section EELS map (Fig. 1B), because the Cr work function is ~0.16 eV lower than that of graphene (12). The contact resistance scales inversely with the contact width (inset in Fig. 1D), as expected for the edge-contact geometry. Finally, we find that the contact resistance is largely independent of temperature (fig. S9), in contrast with the linear temperature scaling that has been reported for surface contacts (15).

To better understand why edge-contacts can lead to low contact resistance, we investigated the structure and behavior of the interface using a first-principle atomistic model. Ab initio simulation assuming a Cr metal electrode indicates that edge-contacts lead to shorter bonding distance with larger orbital overlap than surface contacts, consistent with previous calculations for other common metals in the same contact geometry (25). We also used density functional theory (DFT) combined with the nonequilibrium Green’s function (NEGF) to calculate the transmission efficiency of the contact. Incorporation of some additional interfacial species, such as oxygen, which might result from the etch process, can actually help to improve bonding and increase the transmission. Results from the simulation (supplementary materials section 2.5) are in good agreement with the experimental data, predicting a contact resistance as low as 118 ohm·μm at EECNP = 0.16 eV (n = 2.2 × 1012 cm−2) for a Cr(110)-O-graphene interface, where E-Ecnp represents the fermi energy of graphene relative to the energy corresponding to the charge neutrality point. In both our data and the model, the contact resistance diverged near the charge neutrality point, which could be expected given a decrease of density of states in the 2D graphene layer. Experimentally, we observed an additional local peak in the contact resistance at finite negative density. We have observed that exposure of the graphene edge to a weak O2 plasma immediately before metallization can cause this satellite peak position to vary (fig. S10), indicating that the origin of the second peak may relate to the specific chemistry of the edge termination.

The edge-contact geometry described here enables a new fabrication process that allows us to construct encapsulated BN-G-BN heterostructures before introduction of metal contacts. In this technique, strong van der Waals (vdW) interaction between 2D materials was used to assemble the layered structure directly. Figure 2A shows a schematic of the process where an isolated few-layer BN flake is used as a stamp to successively pick up alternating layers of monolayer graphene and few-layer BN (a detailed description of the vdW assembly process can be found in supplementary materials section 1.1). A critical feature of this technique compared with previous methods to mechanically layer 2D materials is that the active interfaces do not contact any polymer throughout the process, reducing impurities trapped between the layers. Figure 2C shows an atomic force microscope (AFM) image of a BN-G-BN heterostructure made by vdW assembly. The graphene appears clean and free of macroscopic contamination over the entire device area, ~200 μm2. In Fig. 2D, a high-resolution cross section STEM image shows that the resulting interface is pristine down to the atomic scale, with the graphene layer nearly indistinguishable from the adjacent BN lattice planes.

Fig. 2 Polymer-free layer assembly.

(A) Schematic of the van der Waals technique for polymer-free assembly of layered materials. (B) Optical image of a multilayered heterostructure using the process illustrated in (A). (C) AFM image of a large-area encapsulated graphene layer showing that it is pristine and completely free of wrinkles or bubbles except at its boundary. (D) High-resolution cross-section ADF-STEM image of the device in (C). The BN-G-BN interface is found to be pristine and free of any impurities down to the atomic scale.

Figure 3A shows electrical transport from a large-area, 15 μm × 15 μm, BN-G-BN device fabricated by combining vdW assembly with edge-contacts. The transport characteristics indicate the graphene device to be remarkably pristine, reaching a room-temperature mobility in excess of 140,000 cm2/Vs. At carrier density |n| = 4.5 × 1012 cm2, the sheet resistivity is less than ~40 ohms per square (fig. S13), corresponding to an equivalent 3D resistivity below 1.5 μohm·cm, smaller than the resistivity of any metal at room temperature. Indeed, the remarkable feature of this device response is the simultaneous realization of both high mobility and large carrier density. Using the simple Drude model of conductivity, σ = neμ, where μ is the electron mobility, we calculate a mobility of ~40, 000 cm2/Vs at densities as large as n ~ 4.5 × 1012 cm2. In this high-density regime, the measured mobility is comparable to the acoustic-phonon-limited mobility theoretically predicted for intrinsic graphene (28, 29). The room-temperature response of the graphene device reported here outperforms all other 2D materials, including the highest mobility 2D heterostructures fabricated from III-V (groups III and V in the periodic table) semiconductors (30, 31) (Fig. 3B) by at least a factor of 2 over the entire range of technologically relevant carrier densities.

Fig. 3 Large-area, high-performance, BN-G-BN devices.

(A) Four-terminal resistivity measured from a 15 μm × 15 μm device fabricated by the van der Waals assembly technique with edge-contacts. The left inset shows an optical image of the device. Low-temperature response is shown in the right inset. A negative resistance is observed, indicating ballistic transport. (B) Room-temperature mobility versus density (solid black curve). Dashed black curve indicates the theoretical mobility limit due to acoustic-phonon scattering (28, 29). Remaining data points label the range of mobilities reported in the literature for high-performance 2D semiconductor FETs (30, 31). (C and D) Calculated mean free path versus density and temperature for the device shown in (A). Shaded region in (D) indicates the temperature below which the mean free path exceeds the device size. Circle and squares correspond to the “a” configuration and triangles correspond to the “b” configuration of the van der Pauw measurement (supplementary materials section 1.5). (E) Lower bound mean free path at T = 1.7 K for devices with size varying from 1 to 15 μm.

At low temperatures, four-terminal measurement yields a negative resistance (inset in Fig. 3A), indicating quasiballistic transport (4) over at least 15 μm. In the diffusive regime, the mean free path, Lmfp, can be calculated from the conductivity, σ, according to Lmfp = σh/2e2kF where kF = Embedded Image is the Fermi wave vector. In Fig. 3C, Lmfp versus applied gate voltage is shown for selected temperatures from 300 K down to 20 K. The mean free path increases with gate voltage until it saturates at a temperature-dependent value at high density. This maximum Lmfp increases monotonically with decreasing temperature until the mean free path approaches the device size at T ~ 40 K (Fig. 3D). In the low-temperature ballistic regime, four-terminal measurement is dominated by mesoscopic effects (32) and the calculated mean free path exhibits large variation, depending on the measurement geometry. The temperature dependence therefore provides only a lower bound of the mean free path.

The negative resistance observed at base temperature indicates that electrons travel ballistically across the diagonal of the square, corresponding to a mean free path as large as 21 μm in this device. This value corresponds to an electron mobility of ~1,000,000 cm2/Vs at a carrier density of ~3 × 1012 cm2. We repeated this measurement for devices varying in size from 1 to 15 μm. As seen in Fig. 3E, the maximum mean free path scales linearly with device size. This result indicates that in our devices the low-temperature mobility is limited by the available crystal size, and we have not reached the intrinsic impurity-limited scattering length. Even higher mobility could be expected for larger-area devices, which may be realized by combining recent progress in scalable growth techniques (33, 34) together with the edge-contact geometry described here.

Supplementary Materials

www.sciencemag.org/content/342/6158/614/suppl/DC1

Materials and Methods

Supplementary Text

Figs. S1 to S14

Tables S1 to S2

References (3546)

References and Notes

  1. Acknowledgments: This work is supported by the Department of Defense through the National Defense Science and Engineering Graduate Fellowship Program, the National Science Foundation (DMR-1124894), the Air Force Office of Scientific Research (FA9550-09-1-0705), the Office of Naval Research (ONR) (N000141310662 and N000141110633), and the Defense Advanced Research Projects Agency (under ONR Grant N000141210814), and the Nano Material Technology Development Program through the National Research Foundation of Korea (2012M3A7B4049966). We thank E. H. Hwang and S. Das Sarma for helpful discussion.
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